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general description the max31850/MAX31851 cold-junction compensat - ed, 1-wire m thermocouple-to-digital converters perform cold-junction compensation and digitize the signal from a k-, j-, n-, t-, s-, r-, or e-type thermocouple. the con - verters resolve temperatures to 0.25 n c, allow readings as high as +1768 n c and as low as -270 n c, and exhibit thermocouple accuracy of 8 lsbs (2 n c) for temperatures ranging from -200 n c to +700 n c. communication with the master microcontroller is over a 1-wire bus that by definition requires only one data line (and ground) for communication. operating power can be obtained directly from the data line (parasite power), eliminating the need for an external power supply. each device has a unique 64-bit serial code, which allows multiple units to function on the same 1-wire bus. therefore, it is simple to use one microcontroller (the master device) to monitor temperature from many ther - mocouples distributed over a large area. four location address inputs simplify mapping of individual units to specific locations. features s cold-junction compensation s 14-bit, 0.25 n c resolution s versions available for k-, j-, n-, t-, s-, r-, and e-type thermocouples (see table 1 ) s 1-wire interface (read-only); power can be obtained from interface (parasite-powered mode) s detects thermocouple shorts to gnd or v dd s detects open thermocouple applications industrial appliances hvac medical block diagram 19-6725; rev 0; 6/13 ordering information appears at end of data sheet. 1-wire is a registered trademark of maxim integrated products, inc. for related parts and recommended products to use with this part, refer to: www.maximintegrated.com/max31850.related max31850 MAX31851 64-bit rom and 1-wire port adc parasite- power circuit c pp dq v dd gnd memory control logic cold-juction compensation fault detection reference voltage power- supply sense address pin input ad0 ad1 ad2 ad3 scratchpad s5 s1 s3 t+ t- s2 s4 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.
2 supply voltage range (v dd to gnd) .................. -0.3v to +4.0v all other pins ............................................ -0.3v to (v dd + 0.3v) continuous power dissipation (t a = +70 n c) tdfn (derate 16.70mw/ n c above +70 n c) ........... 1333.30mw esd protection (all pins, human body model) ................... 2kv operating temperature range ........................ -40 n c to +125 n c junction temperature ..................................................... +150 n c storage temperature range .......................... -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ..................................... +260 n c tdfn junction-to-ambient thermal resistance ( b ja ) .......... 60 n c/w junction-to-case thermal resistance ( b jc ) ............... 30 n c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) dc electrical characteristics (t a = -40 n c to +125 n c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units supply voltage v dd local power (note 3, 4) 3.0 3.3 3.7 v pullup supply voltage (notes 3, 4) v pu parasite power (note 3) 3.0 3.7 v local power (note 3) 3.0 v dd input logic-low v il (notes 4, 6) -0.3 +0.8 v input logic-high (note 4) v ih local power 2.2 lower of 3.7v or (v dd + 0.3v) v parasite power 3.0 lower of 3.7v or (v dd + 0.3v) output sink current i l v i/o = 0.4v (note 4) 4.0 ma standby supply current i dds (notes 7, 8) 280 1000 na active supply current i dd v dd = 3.7v (note 9) 900 1750 f a dq input current i dq (note 10) 5 f a power-supply rejection -0.3 c/v input leakage current (ad0Cad3 pins) (note 3) -1 +1 f a thermocouple input bias current i btc t a = -40 c to +125 c, 100mv across the thermocouple inputs (note 3) -100 +100 na max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
3 thermal characteristics (3.0v p v dd p 3.6v, t a = -40 n c to +125 n c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units max31850k thermocouple temperature gain and offset error (41.276 f v/ n c nominal sensitivity) (note 11) t thermocouple = -100 n c to +100 n c, t a = 0 n c to +70 n c (note 12) -1 +1 n c t thermocouple = -200 n c to +700 n c, t a = -20 n c to +85 n c (note 12) -2 +2 t thermocouple = +700 n c to +1372 n c, t a = -20 n c to +85 n c (note 12) -4 +4 t thermocouple = -270 n c to +1372 n c, t a = -40 n c to +125 n c (note 12) -6 +6 max31850j thermocouple temperature gain and offset error (57.953 f v/ n c nominal sensitivity) (note 11) t thermocouple = -100 n c to +100 n c, t a = 0 n c to +70 n c (note 12) -1 +1 n c t thermocouple = -210 n c to +750 n c, t a = -20 n c to +85 n c (note 12) -2 +2 t thermocouple = -210 n c to +1200 n c, t a = -40 n c to +125 n c (note 12) -4 +4 max31850n thermocouple temperature gain and offset error (36.256 f v/ n c nominal sensitivity) (note 11) t thermocouple = -100 n c to +100 n c, t a = 0 n c to +70 n c (note 12) -1 +1 n c t thermocouple = -200 n c to +700 n c, t a = -20 n c to +85 n c (note 12) -2 +2 t thermocouple = +700 n c to +1300 n c, t a = -20 n c to +85 n c (note 12) -4 +4 t thermocouple = -270 n c to +1300 n c, t a = -40 n c to +125 n c (note 12) -6 +6 max31850t thermocouple temperature gain and offset error (52.18 f v/ n c nominal sensitivity) (note 11) t thermocouple = -100 n c to +100 n c, t a = 0 n c to +70 n c (note 12) -1 +1 n c t thermocouple = -270 n c to +400 n c, t a = -20 n c to +85 n c (note 12) -2 +2 t thermocouple = -270 n c to +400 n c, t a = -40 n c to +125 n c (note 12) -4 +4 max31850e thermocouple temperature gain and offset error (76.373 f v/ n c nominal sensitivity) (note 11) t thermocouple = -120 n c to +100 n c, t a = -20 n c to +85 n c (note 12) -1 +1 n c t thermocouple = -200 n c to +700 n c, t a = -20 n c to +85 n c (note 12) -2 +2 t thermocouple = +700 n c to +1000 n c, t a = -20 n c to +85 n c (note 12) -4 +4 t thermocouple = -270 n c to +1000 n c, t a = -40 n c to +125 n c (note 12) -5 +5 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
4 thermal characteristics ( continued ) (3.0v p v dd p 3.6v, t a = -40 n c to +125 n c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units max31850r thermocouple temperature gain and offset error (10.506 f v/ n c nominal sensitivity) (note 11) t thermocouple = -50 n c to +100 n c, t a = 0 n c to +70 n c (note 12) -2 +2 n c t thermocouple = -50 n c to +700 n c, t a = -20 n c to +85 n c (note 12) -3 +3 t thermocouple = +700 n c to +1768 n c, t a = -20 n c to +85 n c (note 12) -5 +5 t thermocouple = -50 n c to +1768 n c, t a = -40 n c to +125 n c (note 12) -7 +7 max31850s thermocouple temperature gain and offset error (9.587 f v/ n c nominal sensitivity) (note 11) t thermocouple = -50 n c to +150 n c, t a = 0 n c to +70 n c (note 12) -2 +2 n c t thermocouple = -50 n c to +700 n c, t a = -20 n c to +85 n c (note 12) -3 +3 t thermocouple = +700 n c to +1768 n c, t a = -20 n c to +85 n c (note 12) -5 +5 t thermocouple = -50 n c to +1768 n c, t a = -40 n c to +125 n c (note 12) -7 +7 thermocouple temperature data resolution 0.25 n c thermocouple temperature data long-term drift hot junction temperature = +400 n c 0.24 n c internal cold-junction temperature error t a = -40 n c to +100 n c (note 13) -2 +2 n c cold-junction temperature data resolution t a = -40 n c to +125 n c 0.0625 n c temperature conversion time (thermocouple, cold junction, fault detection) t conv (note 14) 72 100 ms max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
5 note 2: limits are 100% production tested at t a = +25 n c. limits over the operating temperature range and relevant supply volt - age range are guaranteed by design and characterization. note 3: limits are 100% production tested at t a = +25 n c and +85 n c. limits over the operating temperature range and relevant sup - ply voltage are guaranteed by design and characterization. note 4: all voltages are referenced to gnd. currents entering the ic are specified positive and currents exiting the ic are negative. note 5: the pullup supply voltage specification assumes that the pullup device is ideal, and therefore the high level of the pullup is equal to v pu . to meet the devices v ih specification, the actual supply rail for the strong pullup transistor must include margin for the voltage drop across the transistor when it is turned on. thus: v pu_actual = v pu_ideal + v transistor . note 6: to guarantee a presence pulse under low-voltage parasite power conditions, v ilmax , may have to be reduced to as low as 0.5v. note 7: standby current specified up to +70 n c. note 8: to minimize i dds , dq should be within the following ranges: v gnd p v dq p v gnd + 0.3v or v dd - 0.3v p v dq p v dd . note 9: active current refers to supply current during active temperature conversions. note 10: dq is high (high-impedance state with external pullup). note 11: not including cold-junction temperature error or thermocouple nonlinearity. note 12: guaranteed by design. these limits represent six sigma distribution for t a = +25 n c to +85 n c. outside this temperature range, these limits are three sigma distribution. note 13: guaranteed by design. these limits represent a three sigma distribution. note 14: after minimum v dd has been reached during power-up, wait 10ms before initiating temperature conversions. note 15: see the 1-wire timing diagrams . note 16: under parasite power, if t rstl > 960 f s, a power-on reset (por) may occur. note 17: represents the maximum capacitive load that may be applied to the pins and still maintain timing and logic state. 1- wire timing characteristics (3.0v p v dd p 3.6v, t a = -40 n c to +125 n c, unless otherwise noted.) (notes 2, 3) parameter symbol conditions min typ max units time to strong pullup on t spon start convert t command issued 8 s time slot t slot (note 15) 60 120 s recovery time t rec (note 15) 1 s write-0 low time t low0 (note 15) 60 120 s write-1 low time t low1 (note 15) 1 15 s read data valid t rdv (note 15) 15 s reset time high t rsth (note 15) 480 s reset time low t rstl (notes 15, 16) 480 s presence detect high t pdhigh (note 15) 15 60 s presence detect low t pdlow (note 15) 60 240 s capacitance: dq c in/out (note 17) 25 pf capacitance: ad0Cad3 c in_add (note 17) 50 pf max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
6 1-wire timing diagrams 1-wire write-zero time slot 1-wire read-zero time slot 1-wire reset pulse 1-wire presence detect reset pulse from host presence detect t slot t slot t rstl t rsth start of next cycle start of next cycle t low0 t rec t rec t pdhigh t pdlow t rdv max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
7 typical operating characteristics (v cc = +3.3v, t a = +25 n c, unless otherwise noted.) adc accuracy vs. adc input voltage across v cc max31850 toc05 adc input voltage (mv) adc accuracy (c) 40 20 -0.25 -0.20 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 -0.30 0 60 internal temperature = +25c v cc = 3.7v v cc = 3.3v v cc = 3.0v adc accuracy vs. adc input voltage across temperature max31850 toc04 adc input voltage (mv) adc accuracy (c) 40 20 0 0.5 1.0 1.5 2.0 -0.5 0 60 v cc = 3.3v t a = +125c t a = -40c t a = +85c t a = +25c standby supply current vs. temperature max31850 toc02 temperature (c) standby supply current (na) 120 100 60 80 0 20 40 -20 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 -40 v cc = 3.7v internal temperature sensor accuracy max31850 toc03 temperature (c) measurement error (c) 100 80 40 60 0 20 -20 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.4 -40 120 v cc = 3.3v active supply current vs. temperature max31850 toc01 temperature (c) active supply current (a) 100 120 80 60 40 20 0 -20 200 400 600 800 1000 1200 1400 0 -40 v cc = 3.7v max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
8 pin description pin configuration pin name function 1 gnd ground 2 t- thermocouple input. see table 1. do not connect to gnd. 3 t+ thermocouple input. see table 1. 4 v dd power-supply voltage 5 dq data input/output. open-drain 1-wire interface pin. also provides power to the device when used in parasite-power mode (see the parasite power section.) 6 ad0 location address input (least significant bit) 7 ad1 location address input 8 ad2 location address input 9 ad3 location address input (most significant bit) 10 dnc do not connect ep exposed pad. no internal connection. connect to gnd or leave unconnected. + ep 6 ad0 7 ad1 10 dnc 9 ad3 8 ad2 dq v dd gnd t- t+ 5 4 1 2 3 tdfn-ep (3mm x 4mm) top view max31850 MAX31851 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
9 detailed description the max31850/MAX31851 are sophisticated thermo - couple-to-digital converters with a built-in 14-bit analog- to-digital converter (adc), cold-junction compensation sensing and correction, a digital controller, a 1-wire data interface, and associated control logic. the devices are available in several versions, each optimized and trimmed for a specific thermocouple type (k, j, n, t, s, r, or e.). the thermocouple type is indicated in the suffix of the part number (e.g., max31850k). see the ordering information table for all options. the 1-wire bus by definition requires only one data line (and ground) for communication with a central microcon - troller. the data line requires a weak pullup resistor since all devices are linked to the bus through a three-state or open-drain port (i.e., the dq pin). four location address inputs simplify mapping of individual devices to specific locations. each device has a unique 64-bit serial code, allowing multiple devices to function on the same 1-wire bus. therefore, it is simple to use one microcontroller to con - trol many devices distributed over a large area. in this bus system, the microcontroller identifies and addresses devices on the bus using each devices unique 64-bit code. because each device has a unique code, the number of devices that can be addressed on one bus is virtually unlimited. the 1-wire bus protocol, including detailed explanations of the commands and time slots, is described in the 1-wire bus system section. the scratchpad memory contains the 2-byte temperature register that stores the cold-junction-compensated ther - mocouple temperature data. a second 2-byte register stores the local cold-junction temperature. both of these registers also store fault data for open thermocouple as well as shorts to supply and ground. power may be obtained either from a power supply con - nected to v dd , or from the 1-wire pullup resistor through the dq pin when the bus is high. the high bus signal also charges an internal capacitor (c pp ), which then supplies power to the device when the bus is low. this method of deriving power from the 1-wire bus is referred to as parasite power. temperature conversion the devices include signal-conditioning hardware to convert the thermocouples signal into a voltage com - patible with the input channels of the adc. the t+ and t- inputs connect to internal circuitry that reduces the introduction of noise errors from the thermocouple wires. before converting the thermoelectric voltages into equiva - lent temperature values, it is necessary to compensate for the difference between the thermocouple cold-junction side (device ambient temperature) and a 0 n c virtual refer - ence. for a k-type thermocouple, the voltage changes by approximately 41 f v/ n c, which approximates the thermo - couple characteristic with the following linear equation: v out = (41.276 f v/ n c) x (t r - t amb ) where v out is the thermocouple output voltage ( f v), t r is the temperature of the remote thermocouple junction ( n c), and t amb is the temperature of the device ( n c). other thermocouple types use a similar straight-line approximation but with different gain terms. note that the max31850/MAX31851 assume a linear relationship between temperature and voltage. because all thermo - couples exhibit some level of nonlinearity, apply appro - priate correction to the devices output data. cold-junction compensation the function of the thermocouple is to sense a difference in temperature between two ends of the thermocouple wires. the thermocouples hot junction can be read across the operating temperature range ( table 1 ). the reference junction, or cold end (which should be at the same temperature as the board on which the device is mounted) can range from -55 n c to +125 n c. while the temperature at the cold end fluctuates, the device con - tinues to accurately sense the temperature difference at the opposite end. the device senses and corrects for the changes in the reference junction temperature with cold-junction compensation. it does this by first measuring its internal die temperature, which should be held at the same tem - perature as the reference junction. it then measures the voltage from the thermocouples output at the reference junction and converts this to the noncompensated ther - mocouple temperature value. this value is then added to the devices die temperature to calculate the thermo - couples hot junction temperature. note that the hot junction temperature can be lower than the cold junction (or reference junction) temperature. optimal performance from the device is achieved when the thermocouple cold junction and the device are at the same temperature. avoid placing heat-generating devices or components near the max31850/MAX31851 because this could produce cold-junction-related errors. max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
10 conversion functions during the conversion time, t conv , three functions are performed: the temperature conversion of the internal cold-junction temperature, the temperature conversion of the external thermocouple, and the detection of thermo - couple faults. when executing the temperature conversion for the inter - nal cold-junction compensation circuit, the connection to signal from the external thermocouple is opened (switch s4) and the connection to the cold-junction compensa - tion circuit is closed (switch s5). the internal t- reference to ground is still maintained (switch s3 is closed) and the connections to the fault-detection circuit are open (switches s1 and s2). when executing the temperature conversion of the external thermocouple, the connections to the internal fault-detection circuit are opened (switches s1 and s2 in the block diagram ) and the switch connecting the cold- junction compensation circuit is opened (switch s5). the internal ground reference connection (switch s3) and the connection to the adc (switch s4) are closed. this allows the adc to process the voltage detected across the t+ and t- terminals. if t+ and t- are unconnected, the thermocouple temperature sign bit is 0 (msbit of scratchpad byte 1), and the remainder of the thermo - couple temperature value is 1. during fault detection, the connections from the exter - nal thermocouple and cold-junction compensation circuit to the adc are opened (switches s4 and s5, see the block diagram ). the internal ground reference on t- is also opened (switch s3). the connections to the internal fault-detection circuit are closed (switch s1 and s2). the fault-detection circuit tests for shorted connections to v dd or gnd on the t+ and t- inputs, as well as looking for an open thermocouple condi - tion. bits 0, 1, and 2 of the internal (cold junction) temperature data are normally low. bit 2 goes high to indicate a thermocouple short to v dd , bit 1 goes high to indicate a thermocouple short to gnd, and bit 0 goes high to indicate a thermocouple open circuit. if any of these conditions exists, bit 0 of the cold-junction compensated thermacouple temperature data, which is normally low, also goes high to indicate that a fault has occurred. table 1. thermocouple wire connections and nominal sensitivities type t- wire t+ wire temp range ( c) sensitivity (v/ c) cold-junction sensitivity (v/ c) (0 n c to +70 n c) k alumel chromel -270 to +1372 41.276 (0 n c to +1000 n c) 40.73 j constantan iron -210 to +1200 57.953 (0 n c to +750 n c) 52.136 n nisil nicrosil -270 to +1300 36.256 (0 n c to +1000 n c) 27.171 r platinum platinum/rhodium -50 to +1768 10.506 (0 n c to +1000 n c) 6.158 s platinum platinum/rhodium -50 to +1768 9.587 (0 n c to +1000 n c) 6.181 t constantan copper -270 to +400 52.18 (0 n c to +400 n c) 41.56 e constantan chromel -270 to +1000 76.373 (0 n c to +1000 n c) 44.123 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
11 powering the max31850/MAX31851 the max31850/MAX31851 can be powered by an external supply on the v dd pin, or they can operate in parasite power mode, which allows the device to function without a local external supply. parasite power is useful for applications that require remote tempera - ture sensing or those that are very space-constrained. figure 1 shows the devices parasite-power control cir - cuitry, which steals power from the 1-wire bus through dq when the bus is high. the stolen charge powers the device while the bus is high, and some of the charge is stored on the internal parasite-power capacitor (c pp ) to provide power when the bus is low. when the device is used in parasite-power mode, v dd must be connected to ground. in parasite-power mode, the 1-wire bus and c pp can provide sufficient current to the device for most opera - tions as long as the specified timing and voltage require - ments are met (see the dc electrical characteristics and the 1-wire timing characteristics tables). however, when the device is performing temperature conversions, the operating current can be as high as 1.5ma. this current can cause an unacceptable voltage drop across the weak 1-wire pullup resistor and is more current than can be supplied by c pp . to ensure that the device has sufficient supply current, it is necessary to provide a strong pullup on the 1-wire bus whenever temperature conversions are taking place. this can be accomplished by using a mosfet to pull the bus directly to the rail as shown in figure 1 . the 1-wire bus must be switched to the strong pullup within 10 f s (max) after a convert t [44h] command is issued, and the bus must be held high by the pullup for the duration of the conversion (t conv ). no other activity can take place on the 1-wire bus while the pullup is enabled. the device can also be powered by the conventional method of connecting an external power supply to v dd , as shown in figure 2 . the advantage of this method is that the mosfet pullup is not required, and the 1-wire bus is free to carry other traffic during the temperature conversion period. the use of parasite power is not recommended for tem - peratures above 100 n c because the device may not be able to sustain communications due to the higher leak - age currents that can exist at these temperatures. for applications in which such temperatures are likely, it is strongly recommended that the device be powered by an external power supply. figure 1. supplying the parasite-powered max31850/MAX31851 during temperature conversions figure 2. powering the max31850/MAX31851 with an external supply p v pu 4.7k v pu 1-wire bus to other 1-wire devices max31850 gnd dq v dd p v pu 4.7k 1-wire bus to other 1-wire devices (external supply) v dd max31850 gnd dq v dd max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
12 figure 3. 64-bit rom code figure 4. memory map in some situations the bus master might not know whether the devices on the bus are parasite powered or powered by external supplies. the master needs this information to determine if the strong bus pullup should be used dur - ing temperature conversions. to get this information, the master can issue a skip rom [cch] command, followed by a read power supply [b4h] command, followed by a read time slot. during the read time slot, parasite-pow - ered devices pull the bus low, and externally powered devices let the bus remain high. if the bus is pulled low, the master knows that it must supply the strong pullup on the 1-wire bus during temperature conversions. 64-bit rom code each device contains a unique 64-bit code stored in rom ( figure 3 ). the least significant 8 bits of the rom code contain the devices 1-wire family code, 3bh. the next 48 bits contain a unique serial number. the most significant 8 bits contain a cyclic redundancy check (crc) byte that is calculated from the first 56 bits of the rom code. see the crc generation section for a detailed explanation of the crc bits. the 64-bit rom code and associated rom function control logic allow the device to operate as a 1-wire device using the protocol detailed in the 1-wire bus system section. scratchpad the devices scratchpad is organized as shown in figure 4 . all memory commands are described in detail in the max31850/MAX31851 function commands section. byte 0 and byte 1 of scratchpad contain the least sig - nificant byte and the most significant byte of the thermo - couple temperature register, respectively. bytes 2 and 3 contain the lsb and msb of the internal (cold-junction) temperature value, as well as fault status. byte 4 con - tains the configuration information. bytes 5, 6, and 7 are reserved for internal use by the device and cannot be overwritten; these bytes return all ones when read. byte 8 of scratchpad is read-only and contains the crc code for bytes 0C7 of the scratchpad. the device gener - ates this crc using the method described in the crc generation section. msb 8-bit crc code 48-bit serial number msb msb lsb lsb lsb 8-bit family code (3bh) msb lsb cold-junction-compensated thermocouple temperature lsb and fault status (00h ) byte 0 cold-junction-compensated thermocouple temperature msb (00h) byte 1 internal (cold junction) temperature and fault status lsb (00h) byte 2 internal (cold junction) temperature msb (00h) byte 3 configuration register* byte 4 reserved (ffh) byte 5 reserved (ffh) byte 6 reserved (ffh) byte 7 crc byte 8 *the lower 4 bits (ad[3:0]) of the configuration register are hardwired through ad0?ad3. scra tchp ad (power-up state shown in pa rentheses) max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
13 configuration register byte 4 of scratchpad contains the configuration reg - ister, which is organized as shown in configuration register format . the configuration register allows the user to read the programmed value of the address pins. the ad[3:0] bits report the pin-programmed location information. pins connected to dq are reported with logic 1, and pins connected to gnd are reported as logic 0. pins connected to dq or gnd through a resis - tor are valid logic 1s or logic 0s if the resistor is less than 10k i . unconnected or high-impedance ( > 10k i ) connections are indeterminate. bits [7:4] are reserved for internal use and cannot be overwritten; they return a 1 when read. table 2. temperature data format configuration register format note: bits [3:0] are programmed through the four location programming address pins, ad[3:0]. reading the configuration register provides location information on up to 16 individual devices. table 3. thermocouple temperature data format table 4. internal (cold-junction) temperature data format cold-junction-compensated thermocouple temperature data (bytes 0 and 1) bit 7 6 5 4 3 2 1 0 lsbyte (scratchpad byte 0) 2 3 2 2 2 1 2 0 2 -1 2 -2 reserved 1 = fault bit 15 14 13 12 11 10 9 8 msbyte (scratchpad byte 1) sign 2 10 2 9 2 8 2 7 2 6 2 5 2 4 internal (cold-junction) temperature data (bytes 2 and 3) bit 7 6 5 4 3 2 1 0 lsbyte (scratchpad byte 2) 2 -1 2 -2 2 -3 2 -4 reserved 1 = short to v dd 1 = short to gnd 1 = open circuit bit 15 14 13 12 11 10 9 8 msbyte (scratchpad byte 3) sign 2 6 2 5 2 4 2 3 2 2 2 1 2 0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ad3 ad2 ad1 ad0 temperature ( n c) digital output (d[31:18]) +1600.00 0110 0100 0000 00 +1000.00 0011 1110 1000 00 +100.75 0000 0110 0100 11 +25.00 0000 0001 1001 00 0.00 0000 0000 0000 00 -0.25 1111 1111 1111 11 -1.00 1111 1111 1111 00 -250.00 1111 0000 0110 00 temperature ( n c) digital output (d[15:4]) +127.0000 0111 1111 0000 +100.5625 0110 0100 1001 +25.0000 0001 1001 0000 0.0000 0000 0000 0000 -0.0625 1111 1111 1111 -1.0000 1111 1111 0000 -20.0000 1110 1100 0000 -55.0000 1100 1001 0000 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
14 crc generation crc bytes are provided as part of the devices 64-bit rom code, in the 9th byte of scratchpad. the rom code crc is calculated from the first 56 bits of the rom code and is contained in the most significant byte of the rom. the scratchpad crc is calculated from the data in the scratchpad, and therefore changes when the data in it associated scratchpad changes. the crc provides the bus master with a method of data validation when data is read from the device. to verify that data has been read correctly, the bus master must recalculate the crc from the received data and then compare this value to either the rom code crc (for rom reads) or to the scratch - pad crc (for scratchpad reads). if the calculated crc matches the read crc, the data has been received error-free. the comparison of crc values and the deci - sion to continue with an operation are determined entirely by the bus master. there is no circuitry inside the device that prevents a command sequence from proceeding if the device crc (rom or scratchpad) does not match the value generated by the bus master. the equivalent polynomial function of the crc (rom or scratchpad) is: crc = x 8 + x 5 + x 4 + 1 the bus master can recalculate the crc and compare it to the crc values from the device using the polynomial generator shown in figure 5 . this circuit consists of a shift register and xor gates, and the shift register bits are initialized to 0. starting with the least significant bit of the rom code or the least significant bit of byte 0 in the scratchpad, one bit at a time should shifted into the shift register. after shifting in the 56th bit from the rom or the most significant bit of byte 7 from the scratchpad, the polynomial generator contains the recalculated crc. next, the 8-bit rom code or scratchpad crc from the device must be shifted into the circuit. at this point, if the recalculated crc was correct, the shift register contains all zeros. additional information about the maxim 1-wire crc is available in application note 27: understanding and using cyclic redundancy checks with maxim ibut - ton ? products . 1-wire bus system the 1-wire bus system uses a single bus master to control one or more slave devices. the max31850/ MAX31851 are always a slave. when there is only one slave on the bus, the system is referred to as a single- drop system; the system is multidrop if there are multiple slaves on the bus. all data and commands are transmit - ted least significant bit first over the 1-wire bus. the following discussion of the 1-wire bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-wire signaling (signal types and timing). hardware configuration the 1-wire bus has by definition only a single data line. each device (master or slave) interfaces to the data line by using an open-drain or three-state port. this allows each device to release the data line when the device is not transmitting data so the bus is available for use by another device. the devices 1-wire port (dq) is open drain with an internal circuit equivalent to that shown in figure 6 . figure 5. crc generator ibutton is a registered trademark of maxim integrated products, inc. 1st stage 2nd stage 3rd stage 4th stage 7th stage 8th stage 6th stage 5th stage x 0 x 1 x 2 x 3 x 4 polynomial = x 8 + x 5 + x 4 + 1 input data x 5 x 6 x 7 x 8 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
15 figure 6. hardware configuration the 1-wire bus requires an external pullup resistor of approximately 5k i ; thus, the idle state for the 1-wire bus is high. if for any reason a transaction needs to be sus - pended, the bus must be left in the idle state if the transac - tion is to resume. infinite recovery time can occur between bits so long as the 1-wire bus is in the inactive (high) state during the recovery period. if the bus is held low for more than 480 f s, all components on the bus are reset. transaction sequence the transaction sequence for accessing the device is as follows: 1) step 1: initialization 2) step 2: rom command (followed by any required data exchange) 3) step 3: max31850/MAX31851 function command (followed by any required data exchange) it is very important to follow this sequence every time the device is accessed, as the device does not respond if any steps in the sequence are missing or out of order. an exception to this rule is the search rom [f0h] command. after issuing this rom command, the master must return to step 1 in the sequence. initialization all transactions on the 1-wire bus begin with an initializa - tion sequence. the initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). the pres - ence pulse lets the bus master know that slave devices (such as the max31850/MAX31851) are on the bus and are ready to operate. timing for the reset and presence pulses is detailed in the 1-wire signaling section. rom commands after the bus master has detected a presence pulse, it can issue a rom command. these commands operate on the unique 64-bit rom codes of each slave device and allow the master to single out a specific device if many are present on the 1-wire bus. these commands also allow the master to determine how many and what types of devices are present on the bus. there are four rom commands, and each command is 8 bits long. the master device must issue an appropriate rom command before issuing a max31850/MAX31851 function com - mand. figure 7 shows a flowchart for operation of the rom commands. search rom [f0h] when a system is initially powered up, the master must identify the rom codes of all slave devices on the bus, which allows the master to determine the number of slaves and their device types. the master learns the rom codes through a process of elimination that requires the master to perform a search rom cycle (i.e., search rom command followed by data exchange) as many times as necessary to identify all the slave devices. if there is only one slave on the bus, the simpler read rom command can be used in place of the search rom process. for a detailed explanation of the search rom command procedure, refer to application note 937: book of ibutton ? standards . after every search rom cycle, the bus master must return to step 1 (initialization) in the transaction sequence. rx 4.7k 5a typ v pu bus master open-drain port pin 100 mosfet tx rx tx dq max31850/MAX31851 1-wire port rx = receive tx = transmit max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
16 read rom [33h] this command can be used only when there is one slave on the bus. it allows the bus master to read the slaves 64-bit rom code without using the search rom com - mand procedure. if this command is used when there is more than one slave present on the bus, a data collision occurs when all the slaves attempt to respond at the same time. match rom [55h] the match rom command followed by a 64-bit rom code sequence allows the bus master to address a specific slave device on a multidrop or single-drop bus. only the slave that exactly matches the 64-bit rom code sequence responds to the function command issued by the master; all other slaves on the bus wait for a reset pulse. skip rom [cch] the master can use this command to address all devices on the bus simultaneously without sending out any rom code information. for example, the master can make all devices on the bus perform simultaneous temperature conversions by issuing a skip rom command followed by a convert t [44h] function command. note that the read scratchpad command can follow the skip rom command only if there is a single slave device on the bus. in this case, time is saved by allowing the master to read from the slave without sending the devices 64-bit rom code. a skip rom command followed by a read scratchpad command causes a data collision on the bus if there is more than one slave because multiple devices attempt to transmit data simultaneously. max31850/MAX31851 function commands after the bus master has used a rom command to address the max31850/MAX31851 with which it wishes to communicate, the master can issue one of the max31850/MAX31851 function commands. these commands allow the master to read from the devices scratchpad memories, initiate temperature conversions, and determine the power-supply mode. the max31850/ MAX31851 function commands are summarized in table 5 and illustrated by the flowchart in figure 8 . convert t [44h] this command initiates a single thermocouple tempera - ture conversion, which consists of measuring the internal (cold junction) temperature, measuring the thermocouple temperature, and detecting any faults. following the con - version, the resulting cold-junction-compensated thermo - couple data, internal temperature data, and fault status are stored in the two 2-byte temperature registers in the scratchpad memory, and the max31850 returns to its low- power idle state. if the device is being used in parasite- power mode, within 10 f s (max) after this command is issued the master must enable a strong pullup on the 1-wire bus for the duration of the conversion (t conv ) as described in the powering the max31850/MAX31851 sec - tion. if the device is powered by an external supply, the master can issue read time slots after the convert t com - mand and the device responds by transmitting 0 while the temperature conversion is in progress and 1 when the conversion is done. in parasite-power mode, this notifica - tion technique cannot be used because the bus is pulled high by the strong pullup during the conversion. table 5. max31850/MAX31851 function command set note 1: for parasite-powered devices, the master must enable a strong pullup on the 1-wire bus during temperature conversions. no other bus activity can take place during this time. note 2: the master can interrupt the transmission of data at any time by issuing a reset. note 3: during the read time slot, parasite-powered devices pull the dq bus low, and externally powered units let the bus remain high. command description protocol 1-wire bus activity after command is issued convert t (note 1) initiates temperature conversion. 44h the device transmits conversion status to master (not applicable for parasite-powered devices). read scratchpad (note 2) reads the 9-byte scratchpad including the crc byte. beh the device transmits up to 9 data bytes to master. the 9th byte is the crc byte. read power supply (note 3) signals the devices power-supply mode to the master. b4h the device transmits supply status to the master. max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
17 figure 7. rom commands flowchart f0h search rom? n bit 0 match? bit 0 match? cch skip rom? n 55h match rom? n n n 33h read rom? n y y y y y master tx bit 0 device tx family code 1 byte master tx function command device tx serial number 6 bytes device tx crc byte master tx rom command device tx presence pulse master tx reset pulse initialization sequence device tx bit 0 device tx bit 0 master tx bit 0 master tx bit 63 device tx bit 63 device tx bit 63 master tx bit 63 bit 1 match? bit 1 match? n n bit 63 match? bit 63 match? n n y y y y master tx bit 1 device tx bit 1 device tx bit 1 master tx bit 1 y max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
18 figure 8. max31850/MAX31851 function commands flowchart 44h convert t? y n parasite power? master tx function command device begins conversion master rx ?1s? master rx ?0s? y n master enables strong pullup on dq device converts temperature master disables strong pullup device converting temperature? y n master rx ?0s? master rx ?1s? y n y master rx data byte from scratchpad return to initialization sequence for next transaction master rx scratchpad crc byte y beh read scratchpad? y b4h read power supply? parasite power? n n y n n master tx reset? have 8 bytes been read? max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
19 read scratchpad [beh] this command allows the master to read the contents of scratchpad. the data transfer starts with the least signifi - cant bit of byte 0 and continues through the scratchpad until the 9th byte (byte 8, crc) is read. the master can issue a reset to terminate reading at any time if only part of the scratchpad data is needed. the crc is computed while data is read from bytes 0C7, and is shifted out as byte 8. read power supply [b4h] the master device issues this command followed by a read time slot to determine if any devices on the bus are using parasite power. during the read time slot, parasite-powered devices pull the bus low, and externally powered devices do not pull the bus low. see the powering the max31850/ MAX31851 section for more information. building a cross-reference table the procedure in figure 9 uses the search rom com - mand to find all max31850/MAX31851s on the 1-wire bus (16 maximum) and then reads each configuration register to match the rom ids to the hardwired addresses. 1-wire signaling the device uses a strict 1-wire communication protocol to ensure data integrity. several signal types are defined by this protocol: reset pulse, presence pulse, write-zero, write-one, read-zero, and read-one. the bus master initiates all these signals except the presence pulse. all max31850/MAX31851s on the bus are slaves. initialization procedure: reset and presence pulses all communication with the device begins with an initial - ization sequence that consists of a reset pulse from the master followed by a presence pulse from the device. this is illustrated in figure 10 . when the device sends the presence pulse in response to the reset, it is indicating to the master that it is on the bus and ready to operate. during the initialization sequence, the bus master trans - mits (tx) the reset pulse by pulling the 1-wire bus low for 480 f s (min). the bus master then releases the bus and goes into receive mode (rx). when the bus is released, the 5k i pullup resistor pulls the 1-wire bus high. when the device detects this rising edge, it waits 15 f s to 60 f s figure 9. building a cross-reference table search all rom ids on bus and store rom ids (f0h command) n max is the number of rom ids found done building cross-reference t able using rom ids and 4-bit addresses read scratchpad (use ad3?ad0 from config register) master tx next rom id increment counter n = n + 1 n > n max ? n y match rom id to address and add to cross-reference table rom id(0) 0000 rom id ad3?ad0 cross-reference t able note: tempera ture sensors are addresse d by rom id, not by binar y address. rom id(1) 0001 rom id(2) 0010 rom id(3) 0011 rom id(12) 1100 rom id(13) 1101 rom id(14) 1110 rom id(15) 1111 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
20 and then transmits a presence pulse by pulling the 1-wire bus low for 60 f s to 240 f s. read/write time slots the bus master writes data to the device during write time slots and reads data from the device during read time slots. one bit of data is transmitted over the 1-wire bus per time slot. write time slots there are two types of write time slots: write-one time slots and write-zero time slots. the bus master uses a write-one time slot to write a logic 1 to the slave and a write-zero time slot to write a logic 0 to the slave. all write time slots must have a 60 f s (min) duration with a 1 f s (min) recovery time between individual write slots. both types of write time slots are initiated by the master pulling the 1-wire bus low ( figure 11 ). to generate a write-one time slot, after pulling the 1-wire bus low, the bus master must release the 1-wire bus within 15 f s. when the bus is released, the 5k i pullup resistor pulls the bus high. to generate a write-zero time slot, after pulling the 1-wire bus low, the bus master must continue to hold the bus low for the duration of the time slot (at least 60 f s). the slave samples the 1-wire bus during a window that lasts from 15 f s to 60 f s after the master initiates the write time slot. if the bus is high during the sampling window, a 1 is written to the slave. if the line is low, a 0 is written to the device. read time slots the slave can only transmit data to the master when the master issues read time slots. therefore, the master must generate read time slots immediately after issuing a read scratchpad [beh] command or read power supply [b4h] command, so that the device can provide the requested data. in addition, the master can gener - ate read time slots after issuing a convert t [44h] com - mand to verify the operation status as explained in the max31850/MAX31851 function commands section. all read time slots must be 60 f s (min) in duration with a 1 f s (min) recovery time between slots. a read time slot is initiated by the master device pulling the 1-wire bus low for a minimum of 1 f s (t init ) and then releasing the bus ( figure 11 ). after the master initiates the read time slot, the slave begins transmitting a 1 or 0 on bus. the slave transmits a 1 by leaving the bus high and transmits a 0 by pulling the bus low. when transmitting a 0, the slave releases the bus by the end of the time slot, and the pullup resistor pulls the bus back to its high idle state. output data from the slave is valid for 15 f s after the fall - ing edge that initiated the read time slot. therefore, the master must release the bus and then sample the bus state within 15 f s from the start of the slot. figure 12 illustrates that the sum of t init , t rc , and the master sample window must be less than 15 f s for a read time slot. t rc is the rise time due to the resistive and capacitive characteristics of the bus. figure 13 shows that system timing margin is maximized by keeping t init and t rc as short as possible and by locating the master sample time during read time slots towards the end of the 15 f s period. figure 10. initialization timing v pu 1-wire bus master tx reset pulse 480s minimum master rx 480s minimum max31850/MAX31851 tx presence pulse 60s to 240s max31850/MAX31851 waits 15s to 60s gnd bus master pulling low max31850/MAX31851 pulling low resistor pullup max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
21 figure 11. read/write time slot timing diagram figure 12. detailed master read-one timing v pu 1-wire bus start of slot start of slot 60s < tx ?0? < 120s 1s < t rec < 1s < t rec < > 1s > 1s master samples master samples > 1s 15s 15s 30s master write-zero slot max31850/MAX31851 samples min max typ max31850/MAX31851 samples min max typ master write-one slot master read-zero slot master read-one slot gnd v pu 1-wire bus gnd 15s 45s 15s 15s 15s 30s bus master pulling low max31850/MAX31851 pulling low resistor pullup v ih of master master samples v pu 1-wire bus gnd 15s t init > 1s t rc bus master pulling low resistor pullup max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
22 operation example table 6 shows an operation example in which there are multiple devices on the bus using parasite power. the bus master initiates a temperature conversion in a spe - cific max31850/MAX31851 and then reads scratchpad and recalculates the crc to verify the data. figure 13. recommended master read-one timing table 6. operation example master mode data (lsb first) comments tx reset master issues reset pulse. rx presence devices respond with presence pulse. tx f0h master issues search rom command tx reset master issues reset pulse. rx presence devices respond with presence pulse. tx 55h master issues match rom command for desired address tx 64-bit rom code master sends device rom code. tx 44h master issues convert t command. tx dq line held high by strong pullup master applies strong pullup to dq for the duration of the conversion (t conv ). tx reset master issues reset pulse. rx presence devices respond with presence pulse. tx 55h master issues match rom command. tx 64-bit rom code master sends device rom code. tx beh master issues read scratchpad command. rx 9 data bytes master reads entire scratchpad including crc. the master then recalculates the crc of the first 8 data bytes from the scratchpad and compares the calculated crc with the read crc (byte 9). if they match, the master continues; if not, the read operation is repeated. v pu v ih of master t init = small t rc = small master samples 15s 1-wire bus gnd bus master pulling low resistor pullup max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
23 figure 14. address programming diagramv dd powered figure 15. address programming diagramparasite powered applications information open and shorted thermocouple detection the lsb of byte 0 in scratchpad is normally low and goes high if the thermocouple input is open or shorted to ground or v dd . bits 0, 1, and 2 of byte 2 are normally low. when bit 2 (scv) is high, it indicates a thermocouple short to v dd . when bit 1 (scg) is high, it indicates a thermocouple short to ground. when bit 0 (oc) is high, it indicates a thermocouple open circuit. noise considerations because of the small signal levels involved, thermocouple temperature measurement is susceptible to power supply coupled noise. the effects of power-supply noise can be minimized by placing a 0.1 f f ceramic bypass capacitor close to the v dd pin of the device and to gnd. the input amplifier is a low-noise amplifier designed to enable high-precision input sensing. keep the thermocouple and connecting wires away from electrical noise sources. it is strongly recommended to add a 10nf ceramic surface- mount differential capacitor, placed across the t+ and t- pins, in order to filter noise on the thermocouple lines. max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 0 ad0 = gnd ad1 = gnd ad2 = gnd ad3 = gnd v dd v dd 1-wire bus note: ad3?ad0 cannot be left unconnected; each pin must be connected to either v dd or gnd. gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 1 ad0 = v dd ad1 = gnd ad2 = gnd ad3 = gnd v dd v dd gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 2 ad0 = gnd ad1 = v dd ad2 = gnd ad3 = gnd v dd v dd gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 15 ad0 = v dd ad1 = v dd ad2 = v dd ad3 = v dd v dd v dd gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 0 ad0 = gnd ad1 = gnd ad2 = gnd ad3 = gnd v dd 1-wire bus note: ad3?ad0 cannot be left unconnected; each pin must be connected to either dq or gnd. gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 1 ad0 = dq ad1 = gnd ad2 = gnd ad3 = gnd v dd gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 2 ad0 = gnd ad1 = dq ad2 = gnd ad3 = gnd v dd gnd max31850 MAX31851 ad0 ad1 ad2 ad3 dq location 15 ad0 = dq ad1 = dq ad2 = dq ad3 = dq v dd gnd max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
24 ordering information note: all devices are specified over the -40c to +125c operating temperature range. + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. *ep = exposed pad. package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. thermal considerations self-heating degrades the temperature measurement accuracy of the max31850/MAX31851 in some applications. the magnitude of the temperature errors depends on the thermal conductivity of the max31850 package, the mounting technique, and the effects of airflow. use a large ground plane to improve the temperature measurement accuracy of the max31850. the accuracy of a thermocouple system can also be improved by following these precautions: ? use the largest wire possible that does not shunt heat away from the measurement area. ? if a small wire is required, use it only in the region of the measurement, and use extension wire for the region with no temperature gradient. ? avoid mechanical stress and vibration, which could strain the wires. ? when using long thermocouple wires, use a twisted pair extension wire. ? avoid steep temperature gradients. ? try to use the thermocouple wire well within its tem - perature rating. ? use the proper sheathing material in hostile environ - ments to protect the thermocouple wire. ? use extension wire only at low temperatures and only in regions of small gradients. ? keep an event log and a continuous record of thermo - couple resistance. part thermocouple type measured temp range pin-package max31850 katb+ k -270 n c to +1372 n c 10 tdfn-ep* max31850katb+t k -270 n c to +1372 n c 10 tdfn-ep* max31850jatb+ j -210 n c to +1200 n c 10 tdfn-ep* max31850jatb+t j -210 n c to +1200 n c 10 tdfn-ep* max31850natb+ n -270 n c to +1300 n c 10 tdfn-ep* max31850natb+t n -270 n c to +1300 n c 10 tdfn-ep* max31850tatb+ t -270 n c to +400 n c 10 tdfn-ep* max31850tatb+t t -270 n c to +400 n c 10 tdfn-ep* max31850eatb+ e -270 n c to +1000 n c 10 tdfn-ep* max31850eatb+t e -270 n c to +1000 n c 10 tdfn-ep* MAX31851 satb+ s -270 n c to +1768 n c 10 tdfn-ep* MAX31851satb+t s -270 n c to +1768 n c 10 tdfn-ep* MAX31851ratb+ r -270 n c to +1768 n c 10 tdfn-ep* MAX31851ratb+t r -270 n c to +1768 n c 10 tdfn-ep* package type package code outline no. land pattern no. 10 tdfn-ep t1034n+1 21-0268 90-0247 max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters maxim integrated
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 25 ? 2013 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 6/13 initial release max31850/MAX31851 cold-junction compensated, 1-wire thermocouple-to-digital converters

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